Careers at K2Spacecorporation

K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by over $1 billion in total funding from leading investors including Altimeter Capital, ICONIQ, Kleiner Perkins, Lightspeed Venture Partners, Redpoint Ventures, and T. Rowe Price — and with over $1 billion in signed contracts across commercial and US government customers, we're mass-producing the highest-power satellite platforms ever built for missions from LEO to deep space. The rise of heavy-lift launch vehicles is shifting the industry from an era of mass constraint to one of mass abundance, and we believe this new era demands a fundamentally different class of spacecraft. Engineered to survive the harshest radiation environments and to fully capitalize on today's and tomorrow's massive rockets, K2 satellites deliver unmatched capability at constellation scale and across multiple orbits. With multiple launches in 2027 and plans to scale to 100 satellites a year, we're Building Bigger — helping develop the solar system and build toward a Kardashev Type II (K2) civilization. If you are a motivated individual who thrives in a fast-paced environment and you're excited about contributing to the success of a high-growth Series D-funded company, we'd love for you to apply. The Role The software team at K2 is building our stack primarily in Rust because we believe modern programming languages should be fun, as well as correct. We see Rust as a key enabling technology that allows us to be more effective as software engineers across the entire stack whether that is contributing to the GNC algorithms, application software on flight computers, embedded software on microcontrollers, and many things in-between. As a part of the team, you will be responsible for the development and verification of the software used to fly some of the largest spacecraft that have ever been flown. You will be able to write mission-critical code that controls propulsion systems, attitude control systems, and power systems to ensure safe and reliable operation of the vehicle. In your first 6 months you will develop core pieces of the software architecture including the strategies for fault tolerance, real-time control, and telemetry downlink. In your first year you will implement larger software systems and begin verifying your code using both software and hardware in the loop simulators. In your first two years you will operate your code on multiple spacecraft, demonstrating robust performance in demanding missions. Responsibilities Create software architecture for real-time, fault tolerant control of a 20kW+ spacecraft Develop software applications for control of spacecraft subsystems, including propulsion, guidance/attitude control, thermal, power, and communications systems Design and implement state machines for robust operation of the spacecraft Author drivers for microcontroller peripherals and external sensors. Create and utilize robust tools to allow for rapid deployment of quality code Perform data analysis and anomaly investigation to identify and resolve software bugs Support integration and testing of the spacecraft subsystems Build and maintain infrastructure to increase reliability when developing and testing software Qualifications Bachelor's degree in computer science, computer engineering, electrical engineering, math, or a STEM discipline or 3+ years of professional experience in software engineering Development experience in C/C++ or Rust Nice to Have Experience with spacecraft flight software development Fluency with Linux systems programming and driver development Experience with continuous integration and continuous delivery systems Experience working with hard real-time embedded systems (bare-metal or RTOS) Experience authoring no_std systems in Rust Basic knowledge of electronics, computer architecture, and control systems Experience developing or working with state machines Experience with software verification and testing methods Experience with software and network performance analysis and debugging Experience working in Rust production environments Experience with fault tolerant software design and implementation Experience defining and creating test systems for both hardware-in-the-loop and hardware-out-of-the-loop Compensation and Benefits: Base salary range for this role is $123,000 - $170,000 + equity in the company Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level Comprehensive benefits package including paid time off, medical/dental/vision/ coverage, life insurance, paid parental leave, and many other perks If you don’t meet 100% of the preferred skills and experience, we encourage you to still apply! Building a spacecraft unlike any other requires a team unlike any other and non-traditional career twists and turns are encouraged! If you need a reasonable accommodation as part of your application for employment or interviews with us, please let us know. Export Compliance As defined in the ITAR, “U.S. Persons” include U.S. citizens, lawful permanent residents (i.e., Green Card holders), and certain protected individuals (e.g., refugees/asylees, American Samoans). Please consult with a knowledgeable advisor if you are unsure whether you are a “U.S. Person.” The person hired for this role will have access to information and items controlled by U.S. export control regulations, including the export control regulations outlined in the International Traffic in Arms Regulation (ITAR). The person hired for this role must therefore either be a “U.S. person” as defined by 22 C.F.R. § 120.15 or otherwise eligible for a federally issued export control license. Equal Opportunity K2 Space is an Equal Opportunity Employer; employment with K2 Space is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.

K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by over $1 billion in total funding from leading investors including Altimeter Capital, ICONIQ, Kleiner Perkins, Lightspeed Venture Partners, Redpoint Ventures, and T. Rowe Price — and with over $1 billion in signed contracts across commercial and US government customers, we're mass-producing the highest-power satellite platforms ever built for missions from LEO to deep space. The rise of heavy-lift launch vehicles is shifting the industry from an era of mass constraint to one of mass abundance, and we believe this new era demands a fundamentally different class of spacecraft. Engineered to survive the harshest radiation environments and to fully capitalize on today's and tomorrow's massive rockets, K2 satellites deliver unmatched capability at constellation scale and across multiple orbits. With multiple launches in 2027 and plans to scale to 100 satellites a year, we're Building Bigger — helping develop the solar system and build toward a Kardashev Type II (K2) civilization. If you are a motivated individual who thrives in a fast-paced environment and you're excited about contributing to the success of a high-growth Series D-funded company, we'd love for you to apply. The Role K2’s plan doesn't stop at satellite buses, however. By operating our own vehicles and manifesting regular rides to space, K2 is uniquely positioned to design, test, and deploy-at-scale ambitious optical payloads in MEO, GEO, cis-lunar, and deep space on unprecedented timelines. The satellite bus is the platform – the payloads are the mission. There are any number of space-based optical payloads that can generate value here on Earth (ex. forest fire detection, climate and atmospheric monitoring, etc.) and further planetary science in our solar system (ex. hyper-spectral imaging, laser-altimetry) -- all of which require payload-specific optics benches with spectral / spatial filters, beam-shaping optics, image scanning / stabilization mechanisms, electro-optical sensors, fiber-to-free space interfaces, etc. coupled to large aperture, diffraction-limited telescopes for collecting and transmitting optical energy from the UV to the infrared. As an Optical Systems Engineer, you will contribute to defining how K2 designs, manufactures, tests, and deploys optics benches across K2’s optical payload suite. You will be involved in every phase of your optical system’s life cycle, from initial feasibility and architectural trade studies through manufacturing, ground testing, and on-orbit commissioning. The development timelines and manufacturing scale that we are targeting require meaningful innovation , but you will have the resources and full support of K2 to make this possible and help raise the bar for the next generation of space technology companies. Responsibilities Responsible for delivering the... system architecture, SNR budget, and system-specific modeling (ex. stray light, fiber coupling); detailed optical design and tolerancing; development plan (risk reduction timeline, division of labor, test strategy); environmental qualification and reliability testing; technical leadership of vendors and external partners, including component qualification, supply-chain development, and transition to volume manufacturing; and laboratory characterization, system-level validation, mission readiness, and on-orbit commissioning plan … of optical benches for a suite of high-volume optical payloads operating in the UV / VIS / NIR / SWIR / MWIR / LWIR. Collaborate with the optical and satellite bus teams to determine feasibility and optimal system requirements for optical payloads. Prepare design reviews for your optical system to get stakeholder buy-in and communicate expectations to the hardware, software, test, and manufacturing teams. Forecast staffing needs, define roles, and interview candidates to ensure the optical payloads team is staffed appropriately to deliver on schedule. Mentor the engineers supporting you to make them more capable and autonomous in the realm of optical system development in the future – scoping work, providing feedback throughout, and reviewing and signing off on the quality of their work. Manufacturing is a major emphasis of this role. For any in-house fabrication and assembly, you’ll be responsible for the evaluation and selection of manufacturing equipment and working with the production team to develop a factory layout, work instructions, in-process checkouts, and end-of-line tests to ensure successful builds. Qualifications Bachelor’s degree in physics, optics, computer science, mechanical engineering, electrical engineering, or a related technical field. 8+ years of experience in the design, manufacture, and test of optical systems. Experience designing and deploying optical systems at every phase of the product life cycle (requirements generation, design, analysis, tolerance, procure, build, align, test, deploy, operate). Nice to Have Familiarity with high-volume manufacturing – broad knowledge of manufacturing techniques, design for manufacturability, supply chain management, and productionization of assembly and test processes. Experience with optical mechanisms – specifying their requirements, knowledge of feedback and actuation methods, basic controls analysis, quantifying mechanism error, and system-level testing. Deep knowledge of electro-optical sensing technologies (ie. focal plane arrays, photodiodes, etc.) – their non-idealities, noise mechanisms, and mitigations, testing and characterization, and practical implementation / system integration details. Experience conducting experimental research, data analysis, and visualizing esoteric datasets. Understanding of the failure modes of electrical, mechanical, and optical systems in space environment. Compensation and Benefits: Base salary range for this role is $140,000 - $280,000 + equity in the company Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level Comprehensive benefits package including paid time off, medical/dental/vision coverage, life insurance, paid parental leave, and many other perks If you don’t meet 100% of the preferred skills and experience, we encourage you to still apply! Building a spacecraft unlike any other requires a team unlike any other and non-traditional career twists and turns are encouraged! If you need a reasonable accommodation as part of your application for employment or interviews with us, please let us know. Export Compliance As defined in the ITAR, “U.S. Persons” include U.S. citizens, lawful permanent residents (i.e., Green Card holders), and certain protected individuals (e.g., refugees/asylees, American Samoans). Please consult with a knowledgeable advisor if you are unsure whether you are a “U.S. Person.” The person hired for this role will have access to information and items controlled by U.S. export control regulations, including the export control regulations outlined in the International Traffic in Arms Regulation (ITAR). The person hired for this role must therefore either be a “U.S. person” as defined by 22 C.F.R. § 120.15 or otherwise eligible for a federally issued export control license. Equal Opportunity K2 Space is an Equal Opportunity Employer; employment with K2 Space is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.

K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by over $1 billion in total funding from leading investors including Altimeter Capital, ICONIQ, Kleiner Perkins, Lightspeed Venture Partners, Redpoint Ventures, and T. Rowe Price — and with over $1 billion in signed contracts across commercial and US government customers, we're mass-producing the highest-power satellite platforms ever built for missions from LEO to deep space. The rise of heavy-lift launch vehicles is shifting the industry from an era of mass constraint to one of mass abundance, and we believe this new era demands a fundamentally different class of spacecraft. Engineered to survive the harshest radiation environments and to fully capitalize on today's and tomorrow's massive rockets, K2 satellites deliver unmatched capability at constellation scale and across multiple orbits. With multiple launches in 2027 and plans to scale to 100 satellites a year, we're Building Bigger — helping develop the solar system and build toward a Kardashev Type II (K2) civilization. If you are a motivated individual who thrives in a fast-paced environment and you're excited about contributing to the success of a high-growth Series D-funded company, we'd love for you to apply. The Role We are seeking a Senior FPGA & Silicon Bring-up Engineer to accelerate the development of next-generation communications ASICs. You will own FPGA prototyping, firmware enablement, first-silicon bring-up, and hardware validation, serving as the bridge between ASIC design, firmware, software, and system integration. This role spans the entire silicon lifecycle from pre-silicon FPGA platforms that enable early hardware/software integration to post-silicon debug, interface validation, and automated test infrastructure. Responsibilities Develop FPGA-based prototypes to enable early ASIC integration, firmware development, and system validation. Build hardware platforms that allow software and firmware teams to develop before first silicon. Support first-silicon bring-up, debug, and functional validation. Develop automated validation infrastructure for silicon characterization and regression testing. Configure and validate digital interfaces including high-speed Ethernet SerDes, SPI, UART, GPIO, and other peripheral interfaces. Develop FPGA-based traffic generators, protocol checkers, and test applications for interface validation. Debug issues spanning RTL, firmware, software, FPGA prototypes, and silicon using simulation and laboratory instrumentation. Collaborate closely with ASIC Design, Verification, Firmware, Software, Systems, and DFT teams to accelerate product development. Qualifications BS or MS in Electrical Engineering, Computer Engineering, or related field. 5+ years of FPGA development experience using Verilog/SystemVerilog and AMD/Xilinx FPGA tools. Strong understanding of ASIC development and digital system architecture. Experience with FPGA prototyping for ASIC development. Experience with firmware/software enablement and hardware bring-up. Strong hardware debugging skills using JTAG, oscilloscopes, logic analyzers, and protocol analyzers. Proficiency with Python and scripting for automation and test infrastructure. Nice to Have Experience with networking, communications, or satellite systems. Experience with embedded processors (ARM or RISC-V). Experience working with hard real-time embedded systems (bare-metal or RTOS). Experience validating high-speed digital interfaces, including Ethernet and SerDes protocols, SPI, and UART. Experience with silicon bring-up using JTAG, logic analyzers, and oscilloscopes. Compensation and Benefits: Base salary range for this role is $120,000 – $225,000 + equity in the company Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level Comprehensive benefits package including paid time off, medical/dental/vision/ coverage, life insurance, paid parental leave, and many other perks If you don’t meet 100% of the preferred skills and experience, we encourage you to still apply! Building a spacecraft unlike any other requires a team unlike any other and non-traditional career twists and turns are encouraged! If you need a reasonable accommodation as part of your application for employment or interviews with us, please let us know. Export Compliance As defined in the ITAR, “U.S. Persons” include U.S. citizens, lawful permanent residents (i.e., Green Card holders), and certain protected individuals (e.g., refugees/asylees, American Samoans). Please consult with a knowledgeable advisor if you are unsure whether you are a “U.S. Person.” The person hired for this role will have access to information and items controlled by U.S. export control regulations, including the export control regulations outlined in the International Traffic in Arms Regulation (ITAR). The person hired for this role must therefore either be a “U.S. person” as defined by 22 C.F.R. § 120.15 or otherwise eligible for a federally issued export control license. Equal Opportunity K2 Space is an Equal Opportunity Employer; employment with K2 Space is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.

K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by over $1 billion in total funding from leading investors including Altimeter Capital, ICONIQ, Kleiner Perkins, Lightspeed Venture Partners, Redpoint Ventures, and T. Rowe Price — and with over $1 billion in signed contracts across commercial and US government customers, we're mass-producing the highest-power satellite platforms ever built for missions from LEO to deep space. The rise of heavy-lift launch vehicles is shifting the industry from an era of mass constraint to one of mass abundance, and we believe this new era demands a fundamentally different class of spacecraft. Engineered to survive the harshest radiation environments and to fully capitalize on today's and tomorrow's massive rockets, K2 satellites deliver unmatched capability at constellation scale and across multiple orbits. With multiple launches in 2027 and plans to scale to 100 satellites a year, we're Building Bigger — helping develop the solar system and build toward a Kardashev Type II (K2) civilization. If you are a motivated individual who thrives in a fast-paced environment and you're excited about contributing to the success of a high-growth Series D-funded company, we'd love for you to apply. The Role We are seeking a Senior ASIC Physical Design Engineer to help implement advanced SoCs that power next-generation satellite and space systems. In this role, you will contribute to the full physical design flow—from synthesis to GDSII—working closely with architecture, RTL, verification, and packaging teams. You’ll be a key contributor in achieving timing closure, optimizing PPA, and supporting design integration with external partners. You will be part of a collaborative design team developing state-of-the-art mixed-signal SoCs to be hosted on some of the largest, most powerful, rapidly designed and rapidly manufactured satellites ever deployed in space. In your first 6 months, you will develop and implement new SoC sub-systems for satellite communications and beyond. In your first two years, you will have contributed to developing cutting-edge SoCs that will fly in space. Responsibilities Execute the complete physical design flow for complex SoC blocks and top-level integration, including synthesis, floorplanning, place & route, CTS, STA, and physical verification. Perform timing closure and optimization across multiple corners and modes using industry-standard tools. Collaborate with front-end, verification, and DFT teams to ensure clean handoff and predictable convergence. Work with external physical design service providers and internal leads to review deliverables, resolve issues, and ensure schedule alignment. Develop and maintain scripts and automation to improve flow efficiency and consistency. Support physical sign-off activities including DRC/LVS, IR drop, EM, and power analysis. Assist in chip-level integration, ECOs, and tapeout preparation. Contribute to methodology development, tool evaluation, and flow documentation. Support your product through production and spaceflight. Required Qualifications Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field. 5–10 years of experience in ASIC physical design for complex SoCs. Hands-on experience with industry-standard tools (Synopsys ICC2/Fusion Compiler, Cadence Innovus, or equivalent). Strong understanding of timing analysis, power optimization, and physical verification flows. Experience with hierarchical or flat SoC design methodologies. Familiarity with FinFET technologies. Working knowledge of DFT, UPF/CPF power intent, and ECO implementation. Strong problem-solving skills and ability to work cross-functionally in fast-paced environments. Preferred Qualifications Exposure to radiation-hardened or space-qualified ASICs. Experience with chip-package co-design or advanced packaging (2.5D/3D). Familiarity with physical design service vendor management or offshore collaboration. Experience with sign-off through TSMC. Experience with Gate-All-Around technologies. Experience working in cross-functional, geographically distributed teams. Compensation and Benefits: Base salary range for this role is $170,000 – $250,000 + equity in the company Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level Comprehensive benefits package including paid time off, medical/dental/vision/ coverage, life insurance, paid parental leave, and many other perks If you don’t meet 100% of the preferred skills and experience, we encourage you to still apply! Building a spacecraft unlike any other requires a team unlike any other and non-traditional career twists and turns are encouraged! If you need a reasonable accommodation as part of your application for employment or interviews with us, please let us know. Export Compliance As defined in the ITAR, “U.S. Persons” include U.S. citizens, lawful permanent residents (i.e., Green Card holders), and certain protected individuals (e.g., refugees/asylees, American Samoans). Please consult with a knowledgeable advisor if you are unsure whether you are a “U.S. Person.” The person hired for this role will have access to information and items controlled by U.S. export control regulations, including the export control regulations outlined in the International Traffic in Arms Regulation (ITAR). The person hired for this role must therefore either be a “U.S. person” as defined by 22 C.F.R. § 120.15 or otherwise eligible for a federally issued export control license. Equal Opportunity K2 Space is an Equal Opportunity Employer; employment with K2 Space is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.

K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by over $1 billion in total funding from leading investors including Altimeter Capital, ICONIQ, Kleiner Perkins, Lightspeed Venture Partners, Redpoint Ventures, and T. Rowe Price — and with over $1 billion in signed contracts across commercial and US government customers, we're mass-producing the highest-power satellite platforms ever built for missions from LEO to deep space. The rise of heavy-lift launch vehicles is shifting the industry from an era of mass constraint to one of mass abundance, and we believe this new era demands a fundamentally different class of spacecraft. Engineered to survive the harshest radiation environments and to fully capitalize on today's and tomorrow's massive rockets, K2 satellites deliver unmatched capability at constellation scale and across multiple orbits. With multiple launches in 2027 and plans to scale to 100 satellites a year, we're Building Bigger — helping develop the solar system and build toward a Kardashev Type II (K2) civilization. If you are a motivated individual who thrives in a fast-paced environment and you're excited about contributing to the success of a high-growth Series D-funded company, we'd love for you to apply. The Role We are seeking a Senior ASIC Design Verification Engineer whose role will be to verify the functionality, performance, and robustness of our custom silicon designs. You will help define the verification approach, contribute to methodology, and work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation engineers. This is a hands-on role with high ownership, deep technical engagement, and the opportunity to shape first-generation silicon. Responsibilities Develop and execute verification plans for block-level, subsystem-level, and full-chip environments. Build SystemVerilog/UVM test benches, including agents, monitors, scoreboards, checkers, and coverage models. Write SystemVerilog Assertions (SVA) and integrate formal verification where appropriate. Drive constrained-random and directed testing strategies to validate functionality, corner cases, and stress scenarios. Run simulations, triage failures, drive root-cause analysis, and collaborate with RTL designers to resolve issues. Implement and maintain functional coverage, code coverage, assertion coverage, and ensure coverage closure for sign-off. Manage regression testing, simulation farms, and CI pipelines to ensure high test throughput and fast debug iterations. Participate in design reviews, microarchitecture discussions, and influence design-for-verification (DFV) best practices. Work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation engineers to ensure end-to-end coverage and test. Support silicon bring-up and post-silicon validation through test reuse, diagnostics, and debug analysis. Participate in ASIC team interviews. Contribute to advancement of DV methodologies and improvements. Engage external IP providers and verification partners when needed. Qualifications B.S. or M.S. in Electrical Engineering, Computer Engineering, or related field. 5+ years of experience in ASIC/SoC verification. Solid understanding of SystemVerilog, digital logic, RTL design, and hardware verification flows. Proficiency with a simulation (VCS, Xcelium, Questa), waveform debug (Verdi, SimVision), coverage tool, and scripting languages (ex: Python, Perl, TCL). Experience with testplanning, UVM-based testbench development, constrained-random testing, functional coverage, and SystemVerilog assertions. Experience with regression management, coverage analysis, revision control (Git), and CI/CD automation. Understanding of several industry-standard interfaces (ex: APB/AHB/AXI). Familiarity with embedded processor-based designs and firmware/bare metal coding (ex: C, C++). Nice to Have Experience with developing and integrating reference models. Understanding of low power verification. Familiarity with gate-level simulation and analog behavioral models. Involvement in post-silicon validation planning and execution. Experience working in cross-functional, geographically distributed teams. Experience in space, telecom, or RF/digital mixed systems is a plus. Compensation and Benefits: Base salary range for this role is $170,000 – $250,000 + equity in the company Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level Comprehensive benefits package including paid time off, medical/dental/vision/ coverage, life insurance, paid parental leave, and many other perks If you don’t meet 100% of the preferred skills and experience, we encourage you to still apply! Building a spacecraft unlike any other requires a team unlike any other and non-traditional career twists and turns are encouraged! If you need a reasonable accommodation as part of your application for employment or interviews with us, please let us know. Export Compliance As defined in the ITAR, “U.S. Persons” include U.S. citizens, lawful permanent residents (i.e., Green Card holders), and certain protected individuals (e.g., refugees/asylees, American Samoans). Please consult with a knowledgeable advisor if you are unsure whether you are a “U.S. Person.” The person hired for this role will have access to information and items controlled by U.S. export control regulations, including the export control regulations outlined in the International Traffic in Arms Regulation (ITAR). The person hired for this role must therefore either be a “U.S. person” as defined by 22 C.F.R. § 120.15 or otherwise eligible for a federally issued export control license. Equal Opportunity K2 Space is an Equal Opportunity Employer; employment with K2 Space is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.

K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by over $1 billion in total funding from leading investors including Altimeter Capital, ICONIQ, Kleiner Perkins, Lightspeed Venture Partners, Redpoint Ventures, and T. Rowe Price — and with over $1 billion in signed contracts across commercial and US government customers, we're mass-producing the highest-power satellite platforms ever built for missions from LEO to deep space. The rise of heavy-lift launch vehicles is shifting the industry from an era of mass constraint to one of mass abundance, and we believe this new era demands a fundamentally different class of spacecraft. Engineered to survive the harshest radiation environments and to fully capitalize on today's and tomorrow's massive rockets, K2 satellites deliver unmatched capability at constellation scale and across multiple orbits. With multiple launches in 2027 and plans to scale to 100 satellites a year, we're Building Bigger — helping develop the solar system and build toward a Kardashev Type II (K2) civilization. If you are a motivated individual who thrives in a fast-paced environment and you're excited about contributing to the success of a high-growth Series D-funded company, we'd love for you to apply. The Role We are looking for a Principal ASIC Physical Design Engineer to lead the implementation of complex SoCs for next-generation satellite and space systems. You will own the full physical design flow—from RTL handoff to GDSII—and collaborate closely with architecture, RTL design, DFT, and packaging teams. This role also involves managing external physical design partners, driving tool and flow decisions, and ensuring first-pass silicon success in advanced FinFET technologies. You’ll be a key contributor in achieving timing closure, optimizing PPA, and supporting design integration with external partners. You will be part of a collaborative design team developing state-of-the-art mixed-signal SoCs to be hosted on some of the largest, most powerful, rapidly designed and rapidly manufactured satellites ever deployed in space. In your first 6 months, you will develop and implement new SoC sub-systems for satellite communications and beyond. In your first two years, you will have contributed to developing cutting-edge SoCs that will fly in space. Responsibilities Own the complete RTL-to-GDSII flow: synthesis, floorplanning, place & route, clock tree synthesis (CTS), static timing analysis (STA), physical verification (DRC/LVS), and sign-off. Develop and maintain physical design methodologies, scripts, and automation to optimize performance, power, and area (PPA). Collaborate with front-end and verification teams to ensure clean handoffs, timing closure, and efficient design iteration. Drive timing closure across multiple voltage and process corners, including sign-off with foundry-qualified tools. Partner with package, SI/PI, and test teams for package-aware floorplanning and chip-to-board integration. Manage and technically guide external physical design partners and service vendors, ensuring alignment on milestones, deliverables, and quality standards. Work with EDA vendors to debug and optimize tool flows, and evaluate new methodologies. Support chip bring-up and debug through close collaboration with post-silicon and test teams. Support your product through production and spaceflight. Required Qualifications Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field. 10+ years of experience in ASIC physical design for high-performance SoCs. Proven end-to-end expertise in RTL-to-GDSII flows using industry tools (Synopsys, Cadence, or Siemens). Strong hands-on experience with timing closure, IR drop analysis, and ECO implementation. Deep understanding of physical design constraints for multi-clock, multi-voltage, and hierarchical SoCs. Experience with advanced FinFET process nodes. Prior experience managing or coordinating offshore/outsourced PD teams or vendors. Familiarity with DFT integration, STA sign-off, and power domain implementation (UPF/CPF). Excellent communication, leadership, and cross-functional collaboration skills. Act as technical leader and subject-matter expert helping to teach, grow, and mentor others in the team. Preferred Qualifications Exposure to radiation-hardened or space-qualified ASICs. Experience with chip-package co-design or advanced packaging (2.5D/3D). Familiarity with physical design service vendor management or offshore collaboration. Experience driving tapeouts through TSMC. Experience with Gate-All-Around technologies. Experience working in cross-functional, geographically distributed teams. Compensation and Benefits: Base salary range for this role is $190,000 – $280,000 + equity in the company Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level Comprehensive benefits package including paid time off, medical/dental/vision/ coverage, life insurance, paid parental leave, and many other perks If you don’t meet 100% of the preferred skills and experience, we encourage you to still apply! Building a spacecraft unlike any other requires a team unlike any other and non-traditional career twists and turns are encouraged! If you need a reasonable accommodation as part of your application for employment or interviews with us, please let us know. Export Compliance As defined in the ITAR, “U.S. Persons” include U.S. citizens, lawful permanent residents (i.e., Green Card holders), and certain protected individuals (e.g., refugees/asylees, American Samoans). Please consult with a knowledgeable advisor if you are unsure whether you are a “U.S. Person.” The person hired for this role will have access to information and items controlled by U.S. export control regulations, including the export control regulations outlined in the International Traffic in Arms Regulation (ITAR). The person hired for this role must therefore either be a “U.S. person” as defined by 22 C.F.R. § 120.15 or otherwise eligible for a federally issued export control license. Equal Opportunity K2 Space is an Equal Opportunity Employer; employment with K2 Space is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.

K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by over $1 billion in total funding from leading investors including Altimeter Capital, ICONIQ, Kleiner Perkins, Lightspeed Venture Partners, Redpoint Ventures, and T. Rowe Price — and with over $1 billion in signed contracts across commercial and US government customers, we're mass-producing the highest-power satellite platforms ever built for missions from LEO to deep space. The rise of heavy-lift launch vehicles is shifting the industry from an era of mass constraint to one of mass abundance, and we believe this new era demands a fundamentally different class of spacecraft. Engineered to survive the harshest radiation environments and to fully capitalize on today's and tomorrow's massive rockets, K2 satellites deliver unmatched capability at constellation scale and across multiple orbits. With multiple launches in 2027 and plans to scale to 100 satellites a year, we're Building Bigger — helping develop the solar system and build toward a Kardashev Type II (K2) civilization. If you are a motivated individual who thrives in a fast-paced environment and you're excited about contributing to the success of a high-growth Series D-funded company, we'd love for you to apply. The Role We are seeking a Principal ASIC Package Design Engineer to lead advanced ASIC package architecture and execution, with a strong focus on flip-chip BGA (FC-BGA) and multi-chip module (MCM) solutions. This role owns the end-to-end package strategy for high-performance mixed-signal and digital SoCs from early architecture and trade studies through vendor engagement, qualification, and production ramp. You will operate as the technical authority for package design, defining standards, influencing silicon and system architecture, and ensuring first-pass success for complex, high-speed, power-dense ASICs. Responsibilities Own ASIC package architecture for FC-BGA and MCM solutions, including substrate stack-up, ball-map strategy, power delivery, signal breakout, and mechanical constraints. Lead package-level trade studies across cost, performance, power integrity (PI), signal integrity (SI), thermal, manufacturability, and reliability. Define long-term packaging roadmap aligned with future ASIC nodes, bandwidth scaling, and multi-die integration. Establish organizational package design standards, methodologies, and best practices. Drive detailed design of FC-BGA packages for high-pin-count ASICs with high-speed SerDes, dense power grids, and RF signal content. Define and review substrate stack-ups, via strategies, impedance control, escape routing, and reference plane planning. Partner with silicon, RF, and systems teams to co-optimize die floorplans and package interfaces. Own package-level SI/PI strategy, including high-speed digital interfaces (e.g., SerDes, JESD, Interlaken), power delivery network (PDN) design, and decoupling strategy Lead thermal architecture at the package level, including lid selection, TIMs, heat-spreaders, and mechanical interfaces to system cooling. Manage relationships with external packaging vendors, substrate suppliers, and OSATs, including vendor qualification, capability assessment, contract negotiation, and performance/quality score carding to ensure roadmap and volume commitments are met. Drive material selection, substrate technology choices, and assembly process optimization. Required Qualifications Bachelor’s degree in Packaging Engineering, Mechanical Engineering, Electrical Engineering, or a related field. 10+ years of experience in ASIC package design, with deep expertise in FC-BGA. Proven experience delivering high-pin-count, high-performance ASIC packages into production. Strong understanding of substrate technologies and materials, SI/PI fundamentals at the package level, and thermal management for power-dense ASICs. Fluent in SI/PI and EM simulation tools such as SIWave, HFSS, and ADS. Experience working directly with OSATs and substrate vendors. Knowledge of packaging qualification and test methodologies. Preferred Qualifications Experience with MCM or heterogeneous integration (chiplets, interposers, advanced laminates). Background in high-speed digital or mixed-signal SoCs. Familiarity with aerospace, space, or high-reliability electronics. Experience defining packaging strategy from early architecture through first silicon and volume ramp. Demonstrated history of building or scaling package design methodology within an organization. Compensation and Benefits: Base salary range for this role is $200,000 – $280,000 + equity in the company Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level Comprehensive benefits package including paid time off, medical/dental/vision/ coverage, life insurance, paid parental leave, and many other perks If you don’t meet 100% of the preferred skills and experience, we encourage you to still apply! Building a spacecraft unlike any other requires a team unlike any other and non-traditional career twists and turns are encouraged! If you need a reasonable accommodation as part of your application for employment or interviews with us, please let us know. Export Compliance As defined in the ITAR, “U.S. Persons” include U.S. citizens, lawful permanent residents (i.e., Green Card holders), and certain protected individuals (e.g., refugees/asylees, American Samoans). Please consult with a knowledgeable advisor if you are unsure whether you are a “U.S. Person.” The person hired for this role will have access to information and items controlled by U.S. export control regulations, including the export control regulations outlined in the International Traffic in Arms Regulation (ITAR). The person hired for this role must therefore either be a “U.S. person” as defined by 22 C.F.R. § 120.15 or otherwise eligible for a federally issued export control license. Equal Opportunity K2 Space is an Equal Opportunity Employer; employment with K2 Space is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.

K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by over $1 billion in total funding from leading investors including Altimeter Capital, ICONIQ, Kleiner Perkins, Lightspeed Venture Partners, Redpoint Ventures, and T. Rowe Price — and with over $1 billion in signed contracts across commercial and US government customers, we're mass-producing the highest-power satellite platforms ever built for missions from LEO to deep space. The rise of heavy-lift launch vehicles is shifting the industry from an era of mass constraint to one of mass abundance, and we believe this new era demands a fundamentally different class of spacecraft. Engineered to survive the harshest radiation environments and to fully capitalize on today's and tomorrow's massive rockets, K2 satellites deliver unmatched capability at constellation scale and across multiple orbits. With multiple launches in 2027 and plans to scale to 100 satellites a year, we're Building Bigger — helping develop the solar system and build toward a Kardashev Type II (K2) civilization. If you are a motivated individual who thrives in a fast-paced environment and you're excited about contributing to the success of a high-growth Series D-funded company, we'd love for you to apply. The Role We are seeking a Principal ASIC Design Verification Engineer whose role will be to verify the functionality, performance, and robustness of our custom silicon designs. You will help define the verification approach, contribute to methodology, and work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation engineers. This is a hands-on role with high ownership, deep technical engagement, and the opportunity to shape first-generation silicon. Responsibilities Develop and execute verification plans for block-level, subsystem-level, and full-chip environments. Build SystemVerilog/UVM test benches, including agents, monitors, scoreboards, checkers, and coverage models. Write SystemVerilog Assertions (SVA) and integrate formal verification where appropriate. Drive constrained-random and directed testing strategies to validate functionality, corner cases, and stress scenarios. Run simulations, triage failures, drive root-cause analysis, and collaborate with RTL designers to resolve issues. Implement and maintain functional coverage, code coverage, assertion coverage, and ensure coverage closure for sign-off. Manage regression testing, simulation farms, and CI pipelines to ensure high test throughput and fast debug iterations. Participate in design reviews, microarchitecture discussions, and influence design-for-verification (DFV) best practices. Work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation engineers to ensure end-to-end coverage and test. Support silicon bring-up and post-silicon validation through test reuse, diagnostics, and debug analysis. Participate in ASIC team interviews. Drive advancement of DV methodologies and improvements. Manage external IP providers and verification partners when needed. Take lead on large and/or complex systems. Qualifications B.S. or M.S. in Electrical Engineering, Computer Engineering, or related field. 10+ years of experience in ASIC/SoC verification. Solid understanding of SystemVerilog, digital logic, RTL design, DFT, and hardware design and verification flows. Proficiency with several simulation (VCS, Xcelium, Questa), waveform debug (Verdi, SimVision), coverage tools, and scripting languages (ex: Python, Perl, TCL). Experience with test planning, UVM-based testbench development, constrained-random testing, functional coverage, and SystemVerilog assertions. Experience with regression management, coverage analysis, revision control (ex: Git), CI/CD automation, and gate-level simulation. Experience with developing and integrating reference models. Experience with embedded processor-based designs and firmware/bare metal coding (ex: C, C++). Understanding of many industry-standard interfaces (ex: APB/AHB/AXI). Involvement in post-silicon validation planning and execution. Nice to Have Experience with low power verification. Experience with analog behavioral models. Familiarity with physical design flows. Experience working in cross-functional, geographically distributed teams. Experience in space, telecom, or RF/digital mixed systems is a plus. Compensation and Benefits: Base salary range for this role is $190,000 – $285,000 + equity in the company Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level Comprehensive benefits package including paid time off, medical/dental/vision/ coverage, life insurance, paid parental leave, and many other perks If you don’t meet 100% of the preferred skills and experience, we encourage you to still apply! Building a spacecraft unlike any other requires a team unlike any other and non-traditional career twists and turns are encouraged! If you need a reasonable accommodation as part of your application for employment or interviews with us, please let us know. Export Compliance As defined in the ITAR, “U.S. Persons” include U.S. citizens, lawful permanent residents (i.e., Green Card holders), and certain protected individuals (e.g., refugees/asylees, American Samoans). Please consult with a knowledgeable advisor if you are unsure whether you are a “U.S. Person.” The person hired for this role will have access to information and items controlled by U.S. export control regulations, including the export control regulations outlined in the International Traffic in Arms Regulation (ITAR). The person hired for this role must therefore either be a “U.S. person” as defined by 22 C.F.R. § 120.15 or otherwise eligible for a federally issued export control license. Equal Opportunity K2 Space is an Equal Opportunity Employer; employment with K2 Space is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.

K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by over $1 billion in total funding from leading investors including Altimeter Capital, ICONIQ, Kleiner Perkins, Lightspeed Venture Partners, Redpoint Ventures, and T. Rowe Price — and with over $1 billion in signed contracts across commercial and US government customers, we're mass-producing the highest-power satellite platforms ever built for missions from LEO to deep space. The rise of heavy-lift launch vehicles is shifting the industry from an era of mass constraint to one of mass abundance, and we believe this new era demands a fundamentally different class of spacecraft. Engineered to survive the harshest radiation environments and to fully capitalize on today's and tomorrow's massive rockets, K2 satellites deliver unmatched capability at constellation scale and across multiple orbits. With multiple launches in 2027 and plans to scale to 100 satellites a year, we're Building Bigger — helping develop the solar system and build toward a Kardashev Type II (K2) civilization. If you are a motivated individual who thrives in a fast-paced environment and you're excited about contributing to the success of a high-growth Series D-funded company, we'd love for you to apply. The Role You will be responsible for the design and development of radiofrequency (RF) and microwave electronics to be hosted on some of the largest, most powerful, rapidly designed and rapidly manufactured satellites ever deployed in space. In your first 6 months you will architect, develop, own, test, and integrate new RF electronics for use in software defined radio (SDR) systems for satellite communications and beyond. You will work with a multidisciplinary team of antenna, field programmable gate array (FPGA), digital signal processing (DSP), software, mechanical, and electrical engineers in order to prototype your systems and refine your designs. In your first two years you will have flown your system in space and developed cutting-edge radiofrequency systems. Responsibilities Design and development of radiofrequency and microwave hardware from UHF 200 MHz through Ka band 30 GHz, including phased array antennas, low noise amplifiers, power amplifiers, filters, RF mixers, up and downconverters, high speed data converters, and other RF electronics components Design printed circuit board assemblies (PCBAs) for spacecraft including architecture, schematic capture, component selection, layout, bring up and debugging Qualify your designs through environmental testing including vibration, shock, thermal, and thermal vacuum (TVAC) testing Collaborate closely with internal and external stakeholders to integrate your designs into the spacecraft system Act as technical leader and subject-matter expert helping to teach, grow, and mentor others in the team Qualifications Bachelor’s degree in computer science, computer engineering, electrical engineering or related science, technology, engineering, or mathematics field 5+ years of experience in microwave and RF engineering Experience designing multilayer PCBAs and integrating commercial off-the-shelf integrated circuits for RF applications in Altium or similar PCB design tools Experience with RF circuit modeling and analysis software tools such as Cadence AWR Microwave Office and Keysight ADS Experience with RF test equipment such as vector network analyzers (VNA), spectrum analyzer, etc. Ability to work in a fast-paced and high velocity start-up atmosphere Nice to Have Experience with component selection for use in space radiation environments and flying hardware in space Experience with antenna and electromagnetic modeling and analysis software tools such as Ansys Electronics Desktop HFSS and Altair FEKO Experience with FPGA design, implementation, verification, and validation for RF applications Experience with software defined radio hardware development including high speed RF data converters (digital to analog and analog to digital converters), clock trees, and data converter interfaces Experience with phased arrays and digital beamforming Experience with signal intelligence (SIGINT), electronic warfare (EW), and/or satellite telecommunications Knowledge of RF digital communications and digital signal processing (DSP) concepts such as spread spectrum, forward error correction, and modulation types such as BPSK, QAM, etc Compensation and Benefits: Base salary range for this role is $120,000 - $200,000 + equity in the company Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level Comprehensive benefits package including paid time off, medical/dental/vision coverage, life insurance, paid parental leave, and many other perks If you don’t meet 100% of the preferred skills and experience, we encourage you to still apply! Building a spacecraft unlike any other requires a team unlike any other and non-traditional career twists and turns are encouraged! If you need a reasonable accommodation as part of your application for employment or interviews with us, please let us know. Export Compliance As defined in the ITAR, “U.S. Persons” include U.S. citizens, lawful permanent residents (i.e., Green Card holders), and certain protected individuals (e.g., refugees/asylees, American Samoans). Please consult with a knowledgeable advisor if you are unsure whether you are a “U.S. Person.” The person hired for this role will have access to information and items controlled by U.S. export control regulations, including the export control regulations outlined in the International Traffic in Arms Regulation (ITAR). The person hired for this role must therefore either be a “U.S. person” as defined by 22 C.F.R. § 120.15 or otherwise eligible for a federally issued export control license. Equal Opportunity K2 Space is an Equal Opportunity Employer; employment with K2 Space is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.

K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by over $1 billion in total funding from leading investors including Altimeter Capital, ICONIQ, Kleiner Perkins, Lightspeed Venture Partners, Redpoint Ventures, and T. Rowe Price — and with over $1 billion in signed contracts across commercial and US government customers, we're mass-producing the highest-power satellite platforms ever built for missions from LEO to deep space. The rise of heavy-lift launch vehicles is shifting the industry from an era of mass constraint to one of mass abundance, and we believe this new era demands a fundamentally different class of spacecraft. Engineered to survive the harshest radiation environments and to fully capitalize on today's and tomorrow's massive rockets, K2 satellites deliver unmatched capability at constellation scale and across multiple orbits. With multiple launches in 2027 and plans to scale to 100 satellites a year, we're Building Bigger — helping develop the solar system and build toward a Kardashev Type II (K2) civilization. If you are a motivated individual who thrives in a fast-paced environment and you're excited about contributing to the success of a high-growth Series D-funded company, we'd love for you to apply. The Role We're looking for a stellar intern to join our team for a 3 month internship. Working closely with K2 engineers in a highly collaborative environment, you will be responsible for owning a software engineering project end-to-end and supporting actual on-orbit operations of our spacecraft. You will interact with advanced technologies like cyber-physical system simulators, satellite sensors and actuators, build systems, GNC algorithms, and more. Responsibilities Develop physics-based software models for testing control of spacecraft subsystems, including propulsion, guidance/attitude control, thermal, power, and communications systems Author drivers for simulation hardware Create and utilize robust tools to allow for rapid deployment of quality code Perform data analysis and anomaly investigation to identify and resolve software bugs Support integration and testing of spacecraft subsystems Qualifications Development experience in Rust, C++, or similar compiled language Coursework or experience in numerical methods, ordinary differential equations, mechanics, and electricity and magnetism Additional Requirements Available for a minimum 12-week internship in person at our HQ in Torrance Nice to Have Experience using scientific Python (NumPy, SciPy, etc.), Julia, MATLAB, or similar Experience defining and creating simulation systems for both hardware-in-the-loop and hardware-out-of-the-loop testing Experience with Monte Carlo simulations and probability/statistics Experience with linear algebra, signal processing, controls, and/or orbital mechanics Experience with continuous integration and continuous delivery systems Experience with Linux systems programming and driver development Basic knowledge of electronics, computer architecture, and control systems Compensation Hourly pay range for this non-exempt role is $30 - $40 per hour Hourly rate will be based on several factors including, but not limited to: knowledge and skills, education, and experience level Housing and travel stipend may also be available If you don’t meet 100% of the preferred skills and experience, we encourage you to still apply! Building a spacecraft unlike any other requires a team unlike any other and non-traditional career twists and turns are encouraged! If you need a reasonable accommodation as part of your application for employment or interviews with us, please let us know. Export Compliance As defined in the ITAR, “U.S. Persons” include U.S. citizens, lawful permanent residents (i.e., Green Card holders), and certain protected individuals (e.g., refugees/asylees, American Samoans). Please consult with a knowledgeable advisor if you are unsure whether you are a “U.S. Person.” The person hired for this role will have access to information and items controlled by U.S. export control regulations, including the export control regulations outlined in the International Traffic in Arms Regulation (ITAR). The person hired for this role must therefore either be a “U.S. person” as defined by 22 C.F.R. § 120.15 or otherwise eligible for a federally issued export control license. Equal Opportunity K2 Space is an Equal Opportunity Employer; employment with K2 Space is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.