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Job Details: Job Description: The Role and Impact Intel is seeking a highly motivated Software Research Intern (PhD) to join the TCAD Process Reliability Modeling team within Intel Foundry. This internship offers an opportunity to work on advanced computational software solutions supporting semiconductor technology development. The selected candidate will contribute to cutting-edge software applications and solution methodologies like chip-package interactions, thermal transport and thermal management, thin films development and patterning. The internship is designed for PhD students interested in applying software engineering and research expertise to solve complex engineering challenges while collaborating with multidisciplinary teams across Intel. Business Group The Intel Foundry Technology organization is focused on driving semiconductor process innovation and enabling future technology nodes. Within the LTD-TD TCAD team, engineers and researchers develop advanced simulation, modeling, and software solutions used to accelerate technology development. The team fosters a collaborative environment where software, mathematics, physics, and engineering intersect to solve challenging technical problems. Key Responsibilities Design, develop, and optimize software solutions for engineering and research applications. Develop simulations capabilities using numerical methods like finite element, level sets, or related techniques. Develop modeling-based methodologies to solve device and interconnect process, module and reliability problems. Establish criteria and methods to determine proper inputs and validate results. Collaborate with software engineers, researchers, and domain experts to deliver scalable and maintainable solutions. Document technical solutions and present findings to project stakeholders. Qualifications: Minimum Qualifications Must be a full-time student pursuing a Ph.D. degree in Electrical Engineering, Material Science, Mechanical Engineering, Chemical Engineering or a semiconductor-related field. Must have a minimum of a 3.0 GPA in college courses to date. 1+ year experience programming in C/C++/Python or equivalent. Strong analytical, problem-solving, and software development skills. Preferred Qualification s Experience with using TCAD or atomistic simulation tools to study thermo-mechanical and chip/package interactions, thermal transport, thin film deposition processes, patterning, material chemical interactions or circuit performance. Hands on experience development and/or using finite element or equivalent solvers for solutions of physical systems. Experience with physics-based modeling, AI/machine learning methodologies for the analysis of solid mechanics, thermal management, reliability and manufacturing process of microprocessors devices. This is your opportunity to develop your expertise, gain hands-on experience, and make a meaningful impact within a collaborative environment that drives the future of technology. We look forward to seeing how your skills and passion will contribute to our innovative team. Job Type: Student / Intern Shift: Shift 1 (United States of America) Primary Location: US, Oregon, Hillsboro Additional Locations: Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel . Annual Salary Range for jobs which could be performed in the US: $149,598.00-149,602.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Our standard internship rates are based on your degree, location, and the job role. Your recruiter can share more about the specific compensation range for your preferred location and job role during the hiring process. Work Model for this Role This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change. * ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Job Details: Job Description: The Role and Impact Join Intel's world-class team as an EDA Tools Hardware Engineer, where you will play a pivotal role in shaping the future of silicon innovation. This position directly contributes to the enablement and adoption of cutting-edge hardware design tools, flows, and methodologies. Your work will enhance the efficiency of design processes and optimize power, performance, and technology node advancements. As part of Intel, you will have the unique opportunity to collaborate with EDA vendors, define next-generation design tools, and contribute to groundbreaking innovations that enrich lives worldwide. Key Responsibilities Full Chip Implementation Flow Development Develop and maintain full-chip physical implementation flows including: Floor planning and partitioning strategies Hierarchical block integration Chip-level placement and routing coordination Power grid planning and analysis Clock tree synthesis (CTS) strategy integration Enable scalable SoC assembly flows for multi-block and multi-power domain designs. Define methodology for hierarchical design reuse and integration Qualifications: Minimum Qualifications Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science, or a related field with 6+ years of experience; or a Master's degree with 4+ years of experience; or a PhD with 2+ years of experience Physical design fundamentals (I.e. placement, routing) Clock tree synthesis (CTS) Full-chip integration methodologies using Innovus Preferred Qualifications Static timing analysis (STA) Power grid design and IR drop concepts Experience with large SoC or multi-block design implementation flows Experience scripting and automation skills in Linux environments Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, California, Santa Clara Additional Locations: US, California, Folsom, US, Oregon, Hillsboro, US, Texas, Austin Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel . Annual Salary Range for jobs which could be performed in the US: $141,910.00-269,100.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change. * ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Job Details: Job Description: The Role and Impact Join Intel's world-class team as an EDA Tools Hardware Engineer, where you will play a pivotal role in shaping the future of silicon innovation. This position directly contributes to the enablement and adoption of cutting-edge hardware design tools, flows, and methodologies. Your work will enhance the efficiency of design processes and optimize power, performance, and technology node advancements. As part of Intel, you will have the unique opportunity to collaborate with EDA vendors, define next-generation design tools, and contribute to groundbreaking innovations that enrich lives worldwide. Key Responsibilities Full Chip Implementation Flow Development Develop and maintain full-chip physical implementation flows including: Floor planning and partitioning strategies Hierarchical block integration Chip-level placement and routing coordination Power grid planning and analysis Clock tree synthesis (CTS) strategy integration Enable scalable SoC assembly flows for multi-block and multi-power domain designs. Define methodology for hierarchical design reuse and integration Qualifications: Minimum Qualifications Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science, or a related field with 6+ years of experience; or a Master's degree with 4+ years of experience; or a PhD with 2+ years of experience Physical design fundamentals (I.e. placement, routing) Clock tree synthesis (CTS) Full-chip integration methodologies using Innovus Preferred Qualifications Static timing analysis (STA) Power grid design and IR drop concepts Experience with large SoC or multi-block design implementation flows Experience scripting and automation skills in Linux environments Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, California, Santa Clara Additional Locations: US, California, Folsom, US, Oregon, Hillsboro, US, Texas, Austin Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel . Annual Salary Range for jobs which could be performed in the US: $141,910.00-269,100.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change. * ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Job Details: Job Description: What if you could help define how developers program an entirely new class of AI hardware? For nearly a decade, Intel's Neuromorphic Computing Lab, together with a global ecosystem of more than 250 research groups, has advanced architectures, algorithms, and software inspired by the brain's remarkable efficiency, scalability, and adaptability. Our Loihi research chips pioneered event-driven, sparse, and massively parallel neuro-inspired computing, contributing to more than 100 peer-reviewed publications and establishing the potential of this new approach. Now we are taking the next step: transforming those breakthroughs into technologies for physical AI systems, such as robots and intelligent edge devices that must sense, decide, and act under tight latency and power constraints. This is an opportunity to join at a formative stage and help create the kernels, programming abstractions, and performance models for a new hardware architecture built around sparse, event-driven, and massively parallel computation. Your work will directly influence both the hardware and how developers use it. You will also help shape a software stack designed for an era in which engineers and AI agents build and optimize applications together. Position Overview As an AI Software Engineer in Neuromorphic Computing, you will turn new neuromorphic hardware capabilities into working, high-performance AI software and contribute to critical technical areas from design through delivery. You will build specialized kernels for current and next-generation neuromorphic hardware, explore optimization strategies that conventional processors cannot offer, and help shape the programming abstractions that expose those capabilities to developers. Working alongside hardware architects, compiler engineers, and AI researchers, you will use performance and power models to influence design decisions before silicon is available and then validate those decisions using simulators, emulators, and hardware. Your work will span the full hardware-software lifecycle, from modeling a hardware feature to implementing the kernel that unlocks it and demonstrating measurable gains on real AI workloads. You will contribute to the training, porting, and optimization of end-to-end applications for Loihi-based systems while helping improve engineering quality across the team. As part of Intel's CTO Office, you will join a vertically integrated incubation effort dedicated to bringing Intel's neuromorphic technology innovations to market. Our diverse team of engineers and researchers has pioneered sparse, event-based neuromorphic architectures across multiple generations and is now focused on commercializing the technology in future Intel and partner products. The primary responsibilities for this role will include, but are not limited to: Design and implement specialized AI kernels for neuromorphic hardware using custom DSLs and accelerator programming models such as CUDA and SYCL and help shape the programming abstractions for Intel's next-generation neuromorphic architecture. Develop and optimize operations for convolutional networks, transformers, and generative AI workloads by applying techniques such as tiling, fusion, vectorization, parallelization, layout transformation, buffering, sparsity, and quantization. Develop performance methodologies and improve kernel behavior in areas such as compute utilization, latency, throughput, memory bandwidth, data movement, synchronization, and scaling, turning architectural insights into measurable workload gains. Build reference models, numerical validation tools, benchmarks, and analytical or simulation-based performance, power, and area models that guide hardware-software co-design; reconcile discrepancies across models, simulators, emulators, and hardware. Collaborate with hardware, compiler, runtime, and application engineers to deliver maintainable code, tests, documentation, benchmarks, and performance-regression infrastructure. Qualifications: Minimum Qualifications : Minimum qualifications are required to be initially considered for this position. A PhD with no prior professional experience, a master's degree with 2+ years of relevant experience, or a bachelor's degree with 4+ years of relevant experience in Computer Science, Electrical Engineering, Computer Engineering, Applied Mathematics, Physics, or a related technical field. 4+ years of experience developing, debugging, and delivering maintainable software in Python and either C or C++, including performance-critical or systems-level code. 2+ years of experience implementing and optimizing numerical, machine-learning, or high-performance computing kernels using parallel programming and either an accelerator programming model, such as CUDA, SYCL, or OpenCL , or a domain-specific language, such as Triton . 2+ years of experience developing, training, or evaluating AI algorithms and machine-learning models using a framework such as PyTorch, JAX, or TensorFlow . 2+ years of experience establishing numerical correctness and measuring performance using reference implementations, automated testing, benchmarking, profiling, or performance-regression infrastructure. Preferred Qualifications: Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience developing or optimizing workloads based on convolutional networks, transformers, generative AI, or other models relevant to edge and physical AI systems. Experience with compiler technologies or domain-specific language development, such as MLIR, LLVM, TVM, Triton, or related toolchains. Experience with hardware performance modeling, architecture simulators, performance, power, and area (PPA) analysis, or hardware-software co-design. Advanced experience with optimization techniques including kernel fusion, tiling, vectorization, quantization, sparsity, layout optimization, or double buffering. Experience developing software for spatial, dataflow, neuromorphic, or other emerging AI accelerator architectures. Experience contributing to collaborative or open-source software projects using code review, continuous integration, documentation, and testing practices. We are excited to welcome passionate and driven individuals who want to shape the future of AI technology. Your expertise will be invaluable in driving Intel's success and delivering transformative solutions to the world. Job Type: College Grad Shift: Shift 1 (United States of America) Primary Location: US, California, Santa Clara Additional Locations: Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel . Annual Salary Range for jobs which could be performed in the US: $170,500.00-240,710.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change. * ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Job Details: Job Description: The Role and Impact Join Intel's world-class team as an EDA Tools Hardware Engineer, where you will play a pivotal role in shaping the future of silicon innovation. This position directly contributes to the enablement and adoption of cutting-edge hardware design tools, flows, and methodologies. Your work will enhance the efficiency of design processes and optimize power, performance, and technology node advancements. As part of Intel, you will have the unique opportunity to collaborate with EDA vendors, define next-generation design tools, and contribute to groundbreaking innovations that enrich lives worldwide. Key Responsibilities Full Chip Implementation Flow Development Develop and maintain full-chip physical implementation flows including: Floor planning and partitioning strategies Hierarchical block integration Chip-level placement and routing coordination Power grid planning and analysis Clock tree synthesis (CTS) strategy integration Enable scalable SoC assembly flows for multi-block and multi-power domain designs. Define methodology for hierarchical design reuse and integration Qualifications: Minimum Qualifications Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science, or a related field with 6+ years of experience; or a Master's degree with 4+ years of experience; or a PhD with 2+ years of experience Physical design fundamentals (I.e. placement, routing) Clock tree synthesis (CTS) Full-chip integration methodologies using Innovus Preferred Qualifications Static timing analysis (STA) Power grid design and IR drop concepts Experience with large SoC or multi-block design implementation flows Experience scripting and automation skills in Linux environments Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, California, Santa Clara Additional Locations: US, California, Folsom, US, Oregon, Hillsboro, US, Texas, Austin Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel . Annual Salary Range for jobs which could be performed in the US: $141,910.00-269,100.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change. * ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Job Details: Job Description: The Role and Impact Join Intel's world-class team as an EDA Tools Hardware Engineer, where you will play a pivotal role in shaping the future of silicon innovation. This position directly contributes to the enablement and adoption of cutting-edge hardware design tools, flows, and methodologies. Your work will enhance the efficiency of design processes and optimize power, performance, and technology node advancements. As part of Intel, you will have the unique opportunity to collaborate with EDA vendors, define next-generation design tools, and contribute to groundbreaking innovations that enrich lives worldwide. Key Responsibilities Full Chip Implementation Flow Development Develop and maintain full-chip physical implementation flows including: Floor planning and partitioning strategies Hierarchical block integration Chip-level placement and routing coordination Power grid planning and analysis Clock tree synthesis (CTS) strategy integration Enable scalable SoC assembly flows for multi-block and multi-power domain designs. Define methodology for hierarchical design reuse and integration Qualifications: Minimum Qualifications Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science, or a related field with 6+ years of experience; or a Master's degree with 4+ years of experience; or a PhD with 2+ years of experience Physical design fundamentals (I.e. placement, routing) Clock tree synthesis (CTS) Full-chip integration methodologies using Innovus Preferred Qualifications Static timing analysis (STA) Power grid design and IR drop concepts Experience with large SoC or multi-block design implementation flows Experience scripting and automation skills in Linux environments Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, California, Santa Clara Additional Locations: US, California, Folsom, US, Oregon, Hillsboro, US, Texas, Austin Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel . Annual Salary Range for jobs which could be performed in the US: $141,910.00-269,100.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change. * ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Job Details: Job Description: Intel is shaping the future of technology to help create a better future for the entire world. Our work in pushing forward fields like AI, analytics, and cloud-to-edge technology is at the heart of countless innovations. With a career at Intel, you'll have the opportunity to use technology to power major breakthroughs and create enhancements that improve our everyday quality of life. Join us and help make the future more wonderful for everyone. Want to learn more? Visit our YouTube Channel or the link below. Life at Intel The Role and Impact As a System Software Architect, you will play a pivotal role in designing and developing innovative software solutions that drive efficiency and scalability across Intel's manufacturing processes. You will be responsible for architecting robust systems and frameworks that enhance operational performance while ensuring seamless integration with existing technologies. Your contributions will directly impact Intel's ability to deliver world-class semiconductor products efficiently and reliably. Business Group Intel Foundry Services is at the forefront of manufacturing excellence, delivering cutting-edge solutions to meet the complex demands of the semiconductor industry. The group focuses on pioneering advancements in manufacturing technologies, infrastructure optimization, and secure operations, enabling Intel to stay ahead in a fast-evolving landscape. By joining this team, you will contribute to Intel's broader mission of solving technological challenges and empowering innovation worldwide. Key Responsibilities: - Architect scalable and efficient system software frameworks with a focus on performance optimization. - Collaborate with cross-functional teams to ensure seamless integration of software solutions into Intel's manufacturing processes. - Evaluate emerging technologies and apply them to enhance software architectures. - Conduct detailed analysis to identify bottlenecks and implement improvements for secure, reliable, and high-performing systems. - Provide technical mentorship and guidance to development teams, ensuring best practices in system architecture and software design. - Document and present architectural decisions, prototypes, and results to stakeholders in a clear and professional manner. A highly qualified candidate will exhibit the following behavior traits: Experience supporting mission-critical production environments. Strong analytical and troubleshooting skills. Demonstrated written and oral communication skills. Qualifications: You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your school work/classes/research and/or relevant previous job and/or internship experiences. Minimum Qualifications: Bachelor's degree in Computer Science, Information Technology, Engineering, or equivalent experience. 6+ years of experience administering enterprise Microsoft infrastructure. 6+ years of experience in Active Directory Architecture and Design. 6+ years of experience Active Directory Administration, Group Policy Management. 6+ years of experience DNS and DHCP. 6+ years' experience designing scalable system architectures and frameworks. 6+ years' experience with Kerberos and LDAP Authentication. 5+ years' experience system-level security principles and protocols. 2+ years of experience in PowerShell Automation. Preferred Qualifications Familiarity with software development tools and methodologies, such as Agile or DevOps practices. Advanced knowledge of semiconductor manufacturing processes and related software systems. Hands-on experience in software development for operating systems, middleware, or distributed systems Proficiency in modern programming languages such as C++, Python, or Java. Experience leading architectural design projects or initiatives at scale. Strong analytical thinking and problem-solving skills with an ability to innovate. Effective communication and collaboration abilities to work with diverse teams across the organization. Passion for driving technological advancements that enable business growth and operational excellence. We invite you to bring your expertise and enthusiasm to Intel Foundry Services, where your contributions will help shape the future of semiconductor innovation. Join us in redefining what's possible-apply today. Benefits at Intel Our total rewards package goes above and beyond just a paycheck. Whether you're looking to build your career, improve your health, or protect your wealth, we offer generous benefits to help you achieve your goals. Go to Intel Benefits | Intel Careers for details of benefits available to you. Intel reserves the right to modify, change or discontinue benefit plans at any time in its sole discretion. Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, Arizona, Phoenix Additional Locations: US, Oregon, Hillsboro Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel . Annual Salary Range for jobs which could be performed in the US: $149,600.00-284,580.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. Work Model for this Role This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change. * ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Job Details: Job Description: Intel is shaping the future of technology to help create a better future for the entire world. Our work in pushing forward fields like AI, analytics, and cloud-to-edge technology is at the heart of countless innovations. With a career at Intel, you'll have the opportunity to use technology to power major breakthroughs and create enhancements that improve our everyday quality of life. Join us and help make the future more wonderful for everyone. Want to learn more? Visit our YouTube Channel or the link below. Life at Intel The Role and Impact As a System Software Architect, you will play a pivotal role in designing and developing innovative software solutions that drive efficiency and scalability across Intel's manufacturing processes. You will be responsible for architecting robust systems and frameworks that enhance operational performance while ensuring seamless integration with existing technologies. Your contributions will directly impact Intel's ability to deliver world-class semiconductor products efficiently and reliably. Business Group Intel Foundry Services is at the forefront of manufacturing excellence, delivering cutting-edge solutions to meet the complex demands of the semiconductor industry. The group focuses on pioneering advancements in manufacturing technologies, infrastructure optimization, and secure operations, enabling Intel to stay ahead in a fast-evolving landscape. By joining this team, you will contribute to Intel's broader mission of solving technological challenges and empowering innovation worldwide. Key Responsibilities: - Architect scalable and efficient system software frameworks with a focus on performance optimization. - Collaborate with cross-functional teams to ensure seamless integration of software solutions into Intel's manufacturing processes. - Evaluate emerging technologies and apply them to enhance software architectures. - Conduct detailed analysis to identify bottlenecks and implement improvements for secure, reliable, and high-performing systems. - Provide technical mentorship and guidance to development teams, ensuring best practices in system architecture and software design. - Document and present architectural decisions, prototypes, and results to stakeholders in a clear and professional manner. A highly qualified candidate will exhibit the following behavior traits: Experience supporting mission-critical production environments. Strong analytical and troubleshooting skills. Demonstrated written and oral communication skills. Qualifications: You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your school work/classes/research and/or relevant previous job and/or internship experiences. Minimum Qualifications: Bachelor's degree in Computer Science, Information Technology, Engineering, or equivalent experience. 6+ years of experience administering enterprise Microsoft infrastructure. 6+ years of experience in Active Directory Architecture and Design. 6+ years of experience Active Directory Administration, Group Policy Management. 6+ years of experience DNS and DHCP. 6+ years' experience designing scalable system architectures and frameworks. 6+ years' experience with Kerberos and LDAP Authentication. 5+ years' experience system-level security principles and protocols. 2+ years of experience in PowerShell Automation. Preferred Qualifications Familiarity with software development tools and methodologies, such as Agile or DevOps practices. Advanced knowledge of semiconductor manufacturing processes and related software systems. Hands-on experience in software development for operating systems, middleware, or distributed systems Proficiency in modern programming languages such as C++, Python, or Java. Experience leading architectural design projects or initiatives at scale. Strong analytical thinking and problem-solving skills with an ability to innovate. Effective communication and collaboration abilities to work with diverse teams across the organization. Passion for driving technological advancements that enable business growth and operational excellence. We invite you to bring your expertise and enthusiasm to Intel Foundry Services, where your contributions will help shape the future of semiconductor innovation. Join us in redefining what's possible-apply today. Benefits at Intel Our total rewards package goes above and beyond just a paycheck. Whether you're looking to build your career, improve your health, or protect your wealth, we offer generous benefits to help you achieve your goals. Go to Intel Benefits | Intel Careers for details of benefits available to you. Intel reserves the right to modify, change or discontinue benefit plans at any time in its sole discretion. Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, Arizona, Phoenix Additional Locations: US, Oregon, Hillsboro Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel . Annual Salary Range for jobs which could be performed in the US: $149,600.00-284,580.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. Work Model for this Role This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change. * ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.